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Company Announcements

Synopsys Inc

Synopsys and Intel Foundry Fast-Track Customer Readiness from Silicon to Systems on Intel 14A

Certified AI-powered EDA flows, integrated multiphysics analysis, and broad IP portfolio accelerate Angstrom-scale AI and multi-die designs

Key Highlights

  • Certified AI-powered EDA flows and multiphysics analysis for Intel 14A designs: Provide early insight into power integrity, thermal, and electromagnetic effects, improving predictability and accelerating convergence
  • From DTCO to system-aware co-optimization: Extends co-optimization across silicon, package, IP and system domains to enable full system realization with optimal PPA
  • Multi-die and advanced packaging leadership: Synopsys 3DIC Compiler platform extends exploration-to-signoff support to designs integrated with Intel EMIB and Intel EMIB-T, enabling multi-die designs
  • Broad IP portfolio for faster time-to-tapeout: Interface and Foundation IP for Intel 14A — including PCIe 7.0, 224G SerDes, USB 4 and eUSB reduce integration risk and accelerate design readiness

SUNNYVALE, Calif. , July 27, 2026 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced at the 2026 DAC Chips to Systems Conference, expanded collaborations with Intel Foundry with the certification of AI-powered EDA flows on Intel 14A process technology, advancing design enablement from design technology co-optimization (DTCO) to system-aware co-design, building on its certified and production-ready EDA flows and IP portfolio for Intel 18A and Intel 18A-P technologies. As AI and high-performance computing designs move beyond monolithic scaling, success requires connecting process technology with AI-powered EDA flows, multi-die design, integrated multiphysics analysis, and broad IP portfolio to accelerate system-level realization.

Synopsys

"Angstrom-scale design is no longer only about extracting more power, performance, and area from a process node. It is about turning process innovation into predictable system-level outcomes," said Michael Buehler-Garcia, Senior Vice President at Synopsys. "Together with Intel Foundry, Synopsys is helping customers accelerate convergence, reduce late-stage rework, and achieve first-pass silicon success. We applaud the Intel Foundry team for their progress on Intel 14A to expand the capabilities of advanced semiconductor manufacturing."

"In this increasingly AI-driven world, Intel Foundry is committed to supporting our customers by accelerating innovation and providing predictable execution from silicon to packaging on our most advanced technologies," said Shawn Han, SVP and GM, Foundry Services, Intel Corporation. "Our wide-ranging collaboration with Synopsys, including AI-driven, certified flows and IP, gives our customers greater ease of use and confidence to achieve their design goals."

System-Aware Co-Design: EDA Meets Multiphysics

At angstrom-scale geometries with backside power delivery and dense 3D integration, electrical, thermal, and mechanical effects can no longer be effectively analyzed in isolation. Synopsys is uniquely positioned to address this challenge with the integration of Synopsys certified, AI-powered implementation and signoff flows and multiphysics analysis — including power integrity, thermal, and electromagnetic solutions on Intel 14A.

Enabling the Multi-Die Era

With multi-die design now mainstream in AI and HPC, Synopsys and Intel Foundry are extending their proven collaboration to enable efficient system-level integration, analysis, and optimization of advanced chiplet-based architectures. The Synopsys reference design flow based on 3DIC Compiler supports Intel Embedded Multi-die Interconnect Bridge (EMIB) and Embedded Multi-die Interconnect Bridge-T (EMIB-T) advanced packaging technology, with early bump and TSV planning, automated UCIe and HBM routing, and unified multiphysics analysis across dies. Designers can analyze and optimize power delivery networks, thermal gradients, and signal integrity concurrently across die, Intel EMIB and EMIB-T interconnect, and package, catching system-level issues at design time rather than after tapeout. 

Advancing Ecosystem Readiness with Broad IP Portfolio Across Intel 18A, Intel 18A-P and Intel 14A

Synopsys and Intel Foundry continue to enable AI and HPC innovation with Synopsys' expanding portfolio of high-performance interface and foundation IP available today for Intel 18A and Intel 18A-P while expanding to support Intel 14A technologies, helping reduce integration risk and accelerate time-to-tapeout for complex SoCs and multi-die designs. New titles optimized for Intel 14A include:

  • Interface IP, including 224G SerDes, PCIe 7.0, USB 4 and eUSB, addresses the high throughput and connectivity demands of next-generation AI and HPC applications
  • Foundation IP, including embedded memories, logic libraries, and IOs, helps optimize performance, power, and area while lowering total cost of ownership.

Resources

Join Synopsys at the 2026 DAC Chips to Systems Conference

Attendees can visit the Synopsys' booth #631 for demonstrations of the latest solutions and collaborations. For a complete list of Synopsys sessions and activities at DAC 2026, visit the Synopsys DAC 2026 event page.  

About Synopsys 

Synopsys, Inc. (Nasdaq: SNPS) is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow. Learn more at www.synopsys.com. 

 © 2026 Synopsys, Inc. All rights reserved. Synopsys, Ansys, the Synopsys and Ansys logos, and other Synopsys trademarks are available at https://www.synopsys.com/company/legal/trademarks-brands.html. Other company or product names may be trademarks of their respective owners. 

Forward-Looking Statements 

This press release contains forward-looking statements, which involve risks, uncertainties and other factors that could cause our actual results, time frames, or achievements to differ materially. Information on potential risks, uncertainties and other factors that could affect our results is included in filings we make with the SEC from time to time, including in the sections entitled "Risk Factors" in our latest Annual Report on Form 10-K and Quarterly Report on Form 10-Q.

Contacts 

Kelli Wheeler: kelliw@synopsys.com
Pete Smith: pete.smith@synopsys.com 
corp-pr@synopsys.com 

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SOURCE Synopsys, Inc.